1. Field of the Invention
This invention relates to a video display control system adapted to be connected to a video display unit such as a CRT video monitor for displaying a video image on a screen of the video display unit.
2. Prior Art
In recent years, video display control systems capable of displaying both of still and animation pattern images on a screen of a video display unit have been extensively used in graphic video display apparatuses such as video game machines. Such conventional systems are for example, shown in U.S. Pat. Nos. 4,243,984, 4,262,302, 4,286,320, 4,374,395 and 4,387,406. FIG. 1 shows one example of the conventional systems. The system comprises a video display controller (hereinafter referred to as "VDP") 101 and a central processing unit (hereinafter referred to as "CPU") 102. The system further comprises a memory 103 which includes a ROM (read only memory) storing a variety of programs to be executed by the CPU 102 and a RAM for storing other necessary data. The CPU 102 outputs data representative of still and animation images to be displayed on a screen of a video display unit 105 to the VDP 101 which in turn stores the still and animation data into a video RAM (hereinafter referred to as "VRAM") 104. Upon receipt of a display command from the CPU 102, the VDP 101 sequentially reads the still and animation data from the VRAM 104 in accordance with scanning synchronization signals of the video display unit 105, and supplies the read data to the video display unit 105. In this way the still and animation images are displayed on the screen of the video display unit 105.
In a video display control system of the type described above, it is often desired to move a display image at a display area R1 on the screen of the video display unit 105, to another display area R2. In such a case, the CPU 102 of the conventional video display control system first reads data corresponding to the display image in the display area R1 through the VDP 101 from the VRAM 104, and temporarily stores the read data in the memory 103. The CPU 102 then reads the data from the memory 103 and supplies the read data through the VDP 101 to the VRAM 104 to store the data into a memory area of the VRAM 104 which corresponds to the display area R2. The processing to be performed by the CPU 102 to implement the above procedure requires a relatively large amount of time, and the CPU 102 cannot perform other processing during the processing of the movement of the display image.
Also, in a video display control system of the type described above, it is frequently desired to mix colors of the display elements of the display image in the display area R1 with those of the display elements of the display image in the display area R2 when such movement of image shown in FIG. 2 is performed. In the case where the display image in the display area R1 includes transparent portions, it is often desired to leave the colors of corresponding portions of the image in the display area R2 as they are. To perform such processing of colors of the images in the display areas R1 and R2, the CPU 102 of the conventional system is required to read and temporarily store the image data corresponding to the display area R2, in addition to the image data corresponding to the display area R1, and also requires to effect a certain operation on those image data.
Furthermore, it is often desired for a video display control system of the type described above to transfer image data of a display image between the VRAM 104 and an extended memory device other than the VRAM 104 to save and reproduce the display image. It is also frequently desired to write image data, which have been prepared by the CPU 102 in a memory device, into the VRAM 104 to display an image represented by the prepared image data on the screen in an instant. However, a program to be executed by the CPU 102 to perform the above-described processing is fairly complicated.